For more than three decades, the continued miniaturization of metal oxide semiconductor field effect transistors (MOSFETS) has been driven by the market trend such as processor chips, mobile telephones, and memory devices. The semiconductor industry relies on the ability to reduce or scale the dimensions of its basic devices. However, there are growing signs that metal oxide semiconductor transistors are beginning to reach their traditional scaling limits.
This dimension reduction includes scaling dielectric layers in devices, which means dielectric materials cannot be overlooked. Common dielectric material has primarily been fabricated using silicon dioxide. An amorphous SiO2 layer provides an electrically and thermodynamically stable material, where the interface of the SiO2 layer with underlying silicon provides a high quality interface as well as superior electrical isolation properties. However, increased scaling and other requirements in electronic devices have created the need to use other materials as dielectric regions in a variety of electronic structures.